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Government Engineering College

government college of engineering bodinayakkanur, tamil nadu

AOC value
₹90K
AOC date
12 Mar
Completion
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L1 bid
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Timeline

  1. -Published
  2. -Closes
  3. -Bid opens
  4. 12 Mar 20AOC date

Important info

Result ID
Refer Docs
Award of contract
12/03/2020
Published
Refer Docs
Tender closed
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Tender no
Bidding URL
Tender
Bidder details

AOC description

Government Engineering College has published Supply Of Fpga Boards For Vlsi Design Laboratory - 1. 33, 280 Logic Cells In 5200 Slices ( Each Slice Contains Four 6-Input Luts And 8 Flip-Flops ) 2. 1, 800 Kbits Of Fast Block Ram 3. Five Clock Management Tiles, Each With A Phase-Locked Loop ( Pll ) 4. 90 Dsp Slices 5. Internal Clock Speeds Exceeding 450 Mhz 6. On-Chip Analog-To-Digital Converter ( Xadc ) 7. Usb-Jtag Port For Fpga Programming And Communication 8. Serial Flash 9. Usb-Uart Bridge 10. 12-Bit Vga Output 11. Usb Hid Host For Mice, Keyboards And Memory Sticks 12. 16 User Switches 13. 16 User Leds 14. 5 User Push Buttons 15. 4-Digit 7-Segment Display, 4 Pmod Ports: 3 Standard 12-Pin Pmod Ports, 1 Dual Purpose Xadc Signal / Standard Pmod Port.. Last date of submission for this tender is 2019-12-13. This is a Static Converters tender in Government College Of Engineering Bodinayakkanur, Tamil Nadu

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Documents

3 issued
  • Tender Document 1html
  • Tender Document 2xlsx
  • Tender Document 3pdf
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Bidder Details

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